35 #define ESP8266_REG(addr) *((volatile uint32_t*)(0x60000000 + (addr)))
36 #define ESP8266_DREG(addr) *((volatile uint32_t*)(0x3FF00000 + (addr)))
37 #define ESP8266_CLOCK 80000000UL
40 #define CPU2X ESP8266_DREG(0x14)
43 #define MAC0 ESP8266_DREG(0x50)
44 #define MAC1 ESP8266_DREG(0x54)
45 #define CHIPID ESP8266_DREG(0x58)
48 #define GPO ESP8266_REG(0x300)
49 #define GPOS ESP8266_REG(0x304)
50 #define GPOC ESP8266_REG(0x308)
51 #define GPE ESP8266_REG(0x30C)
52 #define GPES ESP8266_REG(0x310)
53 #define GPEC ESP8266_REG(0x314)
54 #define GPI ESP8266_REG(0x318)
55 #define GPIE ESP8266_REG(0x31C)
56 #define GPIES ESP8266_REG(0x320)
57 #define GPIEC ESP8266_REG(0x324)
59 #define GPOP(p) ((GPO & (1 << ((p)&0xF))) != 0)
60 #define GPEP(p) ((GPE & (1 << ((p)&0xF))) != 0)
61 #define GPIP(p) ((GPI & (1 << ((p)&0xF))) != 0)
62 #define GPIEP(p) ((GPIE & (1 << ((p)&0xF))) != 0)
65 #define GPC(p) ESP8266_REG(0x328 + ((p & 0xF) * 4))
66 #define GPC0 ESP8266_REG(0x328)
67 #define GPC1 ESP8266_REG(0x32C)
68 #define GPC2 ESP8266_REG(0x330)
69 #define GPC3 ESP8266_REG(0x334)
70 #define GPC4 ESP8266_REG(0x338)
71 #define GPC5 ESP8266_REG(0x33C)
72 #define GPC6 ESP8266_REG(0x340)
73 #define GPC7 ESP8266_REG(0x344)
74 #define GPC8 ESP8266_REG(0x348)
75 #define GPC9 ESP8266_REG(0x34C)
76 #define GPC10 ESP8266_REG(0x350)
77 #define GPC11 ESP8266_REG(0x354)
78 #define GPC12 ESP8266_REG(0x358)
79 #define GPC13 ESP8266_REG(0x35C)
80 #define GPC14 ESP8266_REG(0x360)
81 #define GPC15 ESP8266_REG(0x364)
89 #define GPMUX ESP8266_REG(0x800)
91 #define GPF0 ESP8266_REG(0x834)
92 #define GPF1 ESP8266_REG(0x818)
93 #define GPF2 ESP8266_REG(0x838)
94 #define GPF3 ESP8266_REG(0x814)
95 #define GPF4 ESP8266_REG(0x83C)
96 #define GPF5 ESP8266_REG(0x840)
97 #define GPF6 ESP8266_REG(0x81C)
98 #define GPF7 ESP8266_REG(0x820)
99 #define GPF8 ESP8266_REG(0x824)
100 #define GPF9 ESP8266_REG(0x828)
101 #define GPF10 ESP8266_REG(0x82C)
102 #define GPF11 ESP8266_REG(0x830)
103 #define GPF12 ESP8266_REG(0x804)
104 #define GPF13 ESP8266_REG(0x808)
105 #define GPF14 ESP8266_REG(0x80C)
106 #define GPF15 ESP8266_REG(0x810)
109 #define GPF(p) ESP8266_REG(0x800 + esp8266_gpioToFn[(p & 0xF)])
121 #define GPFFS(f) (((((f)&4) != 0) << GPFFS2) | ((((f)&2) != 0) << GPFFS1) | ((((f)&1) != 0) << GPFFS0))
122 #define GPFFS_GPIO(p) (((p) == 0 || (p) == 2 || (p) == 4 || (p) == 5) ? 0 : ((p) == 16) ? 1 : 3)
123 #define GPFFS_BUS(p) \
124 (((p) == 1 || (p) == 3) ? 0 \
125 : ((p) == 2 || (p) == 12 || (p) == 13 || (p) == 14 || (p) == 15) ? 2 : ((p) == 0) ? 4 : 1)
128 #define GP16O ESP8266_REG(0x768)
129 #define GP16E ESP8266_REG(0x774)
130 #define GP16I ESP8266_REG(0x78C)
133 #define GP16C ESP8266_REG(0x790)
137 #define GP16F ESP8266_REG(0x7A0)
146 #define GP16FFS(f) (((f)&0x03) | (((f)&0x04) << 4))
149 #define T1L ESP8266_REG(0x600)
150 #define T1V ESP8266_REG(0x604)
151 #define T1C ESP8266_REG(0x608)
152 #define T1I ESP8266_REG(0x60C)
154 #define TEIE ESP8266_DREG(0x04)
158 #define T2L ESP8266_REG(0x620)
159 #define T2V ESP8266_REG(0x624)
160 #define T2C ESP8266_REG(0x628)
161 #define T2I ESP8266_REG(0x62C)
162 #define T2A ESP8266_REG(0x630)
172 #define RTCSV ESP8266_REG(0x704)
173 #define RTCCV ESP8266_REG(0x71C)
174 #define RTCIS ESP8266_REG(0x720)
175 #define RTCIC ESP8266_REG(0x724)
176 #define RTCIE ESP8266_REG(0x728)
178 #define RTC_USER_MEM ((volatile uint32_t*)0x60001200)
181 #define IOSWAP ESP8266_DREG(0x28)
191 #define UIS ESP8266_DREG(0x20020)
196 #define U0F ESP8266_REG(0x000)
197 #define U0IR ESP8266_REG(0x004)
198 #define U0IS ESP8266_REG(0x008)
199 #define U0IE ESP8266_REG(0x00c)
200 #define U0IC ESP8266_REG(0x010)
201 #define U0D ESP8266_REG(0x014)
202 #define U0A ESP8266_REG(0x018)
203 #define U0S ESP8266_REG(0x01C)
204 #define U0C0 ESP8266_REG(0x020)
205 #define U0C1 ESP8266_REG(0x024)
206 #define U0LP ESP8266_REG(0x028)
207 #define U0HP ESP8266_REG(0x02C)
208 #define U0PN ESP8266_REG(0x030)
209 #define U0DT ESP8266_REG(0x078)
210 #define U0ID ESP8266_REG(0x07C)
213 #define U1F ESP8266_REG(0xF00)
214 #define U1IR ESP8266_REG(0xF04)
215 #define U1IS ESP8266_REG(0xF08)
216 #define U1IE ESP8266_REG(0xF0c)
217 #define U1IC ESP8266_REG(0xF10)
218 #define U1D ESP8266_REG(0xF14)
219 #define U1A ESP8266_REG(0xF18)
220 #define U1S ESP8266_REG(0xF1C)
221 #define U1C0 ESP8266_REG(0xF20)
222 #define U1C1 ESP8266_REG(0xF24)
223 #define U1LP ESP8266_REG(0xF28)
224 #define U1HP ESP8266_REG(0xF2C)
225 #define U1PN ESP8266_REG(0xF30)
226 #define U1DT ESP8266_REG(0xF78)
227 #define U1ID ESP8266_REG(0xF7C)
230 #define USF(u) ESP8266_REG(0x000 + (0xF00 * (u & 1)))
231 #define USIR(u) ESP8266_REG(0x004 + (0xF00 * (u & 1)))
232 #define USIS(u) ESP8266_REG(0x008 + (0xF00 * (u & 1)))
233 #define USIE(u) ESP8266_REG(0x00c + (0xF00 * (u & 1)))
234 #define USIC(u) ESP8266_REG(0x010 + (0xF00 * (u & 1)))
235 #define USD(u) ESP8266_REG(0x014 + (0xF00 * (u & 1)))
236 #define USA(u) ESP8266_REG(0x018 + (0xF00 * (u & 1)))
237 #define USS(u) ESP8266_REG(0x01C + (0xF00 * (u & 1)))
238 #define USC0(u) ESP8266_REG(0x020 + (0xF00 * (u & 1)))
239 #define USC1(u) ESP8266_REG(0x024 + (0xF00 * (u & 1)))
240 #define USLP(u) ESP8266_REG(0x028 + (0xF00 * (u & 1)))
241 #define USHP(u) ESP8266_REG(0x02C + (0xF00 * (u & 1)))
242 #define USPN(u) ESP8266_REG(0x030 + (0xF00 * (u & 1)))
243 #define USDT(u) ESP8266_REG(0x078 + (0xF00 * (u & 1)))
244 #define USID(u) ESP8266_REG(0x07C + (0xF00 * (u & 1)))
295 #define SPIRDY ESP8266_DREG(0x0C)
299 #define SPI0CMD ESP8266_REG(0x200)
300 #define SPI0A ESP8266_REG(0x204)
301 #define SPI0C ESP8266_REG(0x208)
302 #define SPI0C1 ESP8266_REG(0x20C)
303 #define SPI0RS ESP8266_REG(0x210)
304 #define SPI0C2 ESP8266_REG(0x214)
305 #define SPI0CLK ESP8266_REG(0x218)
306 #define SPI0U ESP8266_REG(0x21C)
307 #define SPI0U1 ESP8266_REG(0x220)
308 #define SPI0U2 ESP8266_REG(0x224)
309 #define SPI0WS ESP8266_REG(0x228)
310 #define SPI0P ESP8266_REG(0x22C)
311 #define SPI0S ESP8266_REG(0x230)
312 #define SPI0S1 ESP8266_REG(0x234)
313 #define SPI0S2 ESP8266_REG(0x238)
314 #define SPI0S3 ESP8266_REG(0x23C)
315 #define SPI0W0 ESP8266_REG(0x240)
316 #define SPI0W1 ESP8266_REG(0x244)
317 #define SPI0W2 ESP8266_REG(0x248)
318 #define SPI0W3 ESP8266_REG(0x24C)
319 #define SPI0W4 ESP8266_REG(0x250)
320 #define SPI0W5 ESP8266_REG(0x254)
321 #define SPI0W6 ESP8266_REG(0x258)
322 #define SPI0W7 ESP8266_REG(0x25C)
323 #define SPI0W8 ESP8266_REG(0x260)
324 #define SPI0W9 ESP8266_REG(0x264)
325 #define SPI0W10 ESP8266_REG(0x268)
326 #define SPI0W11 ESP8266_REG(0x26C)
327 #define SPI0W12 ESP8266_REG(0x270)
328 #define SPI0W13 ESP8266_REG(0x274)
329 #define SPI0W14 ESP8266_REG(0x278)
330 #define SPI0W15 ESP8266_REG(0x27C)
331 #define SPI0E3 ESP8266_REG(0x2FC)
332 #define SPI0W(p) ESP8266_REG(0x240 + ((p & 0xF) * 4))
335 #define SPI1CMD ESP8266_REG(0x100)
336 #define SPI1A ESP8266_REG(0x104)
337 #define SPI1C ESP8266_REG(0x108)
338 #define SPI1C1 ESP8266_REG(0x10C)
339 #define SPI1RS ESP8266_REG(0x110)
340 #define SPI1C2 ESP8266_REG(0x114)
341 #define SPI1CLK ESP8266_REG(0x118)
342 #define SPI1U ESP8266_REG(0x11C)
343 #define SPI1U1 ESP8266_REG(0x120)
344 #define SPI1U2 ESP8266_REG(0x124)
345 #define SPI1WS ESP8266_REG(0x128)
346 #define SPI1P ESP8266_REG(0x12C)
347 #define SPI1S ESP8266_REG(0x130)
348 #define SPI1S1 ESP8266_REG(0x134)
349 #define SPI1S2 ESP8266_REG(0x138)
350 #define SPI1S3 ESP8266_REG(0x13C)
351 #define SPI1W0 ESP8266_REG(0x140)
352 #define SPI1W1 ESP8266_REG(0x144)
353 #define SPI1W2 ESP8266_REG(0x148)
354 #define SPI1W3 ESP8266_REG(0x14C)
355 #define SPI1W4 ESP8266_REG(0x150)
356 #define SPI1W5 ESP8266_REG(0x154)
357 #define SPI1W6 ESP8266_REG(0x158)
358 #define SPI1W7 ESP8266_REG(0x15C)
359 #define SPI1W8 ESP8266_REG(0x160)
360 #define SPI1W9 ESP8266_REG(0x164)
361 #define SPI1W10 ESP8266_REG(0x168)
362 #define SPI1W11 ESP8266_REG(0x16C)
363 #define SPI1W12 ESP8266_REG(0x170)
364 #define SPI1W13 ESP8266_REG(0x174)
365 #define SPI1W14 ESP8266_REG(0x178)
366 #define SPI1W15 ESP8266_REG(0x17C)
367 #define SPI1E0 ESP8266_REG(0x1F0)
368 #define SPI1E1 ESP8266_REG(0x1F4)
369 #define SPI1E2 ESP8266_REG(0x1F8)
370 #define SPI1E3 ESP8266_REG(0x1FC)
371 #define SPI1W(p) ESP8266_REG(0x140 + ((p & 0xF) * 4))
374 #define SPIIR ESP8266_DREG(0x20)
380 #define SPICMDREAD (1 << 31)
381 #define SPICMDWREN (1 << 30)
382 #define SPICMDWRDI (1 << 29)
383 #define SPICMDRDID (1 << 28)
384 #define SPICMDRDSR (1 << 27)
385 #define SPICMDWRSR (1 << 26)
386 #define SPICMDPP (1 << 25)
387 #define SPICMDSE (1 << 24)
388 #define SPICMDBE (1 << 23)
389 #define SPICMDCE (1 << 22)
390 #define SPICMDDP (1 << 21)
391 #define SPICMDRES (1 << 20)
392 #define SPICMDHPM (1 << 19)
393 #define SPICMDUSR (1 << 18)
394 #define SPIBUSY (1 << 18)
397 #define SPICWBO (1 << 26)
398 #define SPICRBO (1 << 25)
399 #define SPICQIO (1 << 24)
400 #define SPICDIO (1 << 23)
401 #define SPIC2BSE (1 << 22)
402 #define SPICWPR (1 << 21)
403 #define SPICQOUT (1 << 20)
404 #define SPICSHARE (1 << 19)
405 #define SPICHOLD (1 << 18)
406 #define SPICAHB (1 << 17)
407 #define SPICSSTAAI (1 << 16)
408 #define SPICRESANDRES (1 << 15)
409 #define SPICDOUT (1 << 14)
410 #define SPICFASTRD (1 << 13)
413 #define SPIC1TCSH 0xF
414 #define SPIC1TCSH_S 28
415 #define SPIC1TRES 0xFFF
416 #define SPIC1TRES_S 16
417 #define SPIC1BTL 0xFFFF
421 #define SPIRSEXT 0xFF
422 #define SPIRSEXT_S 24
425 #define SPIRSSP (1 << 7)
426 #define SPIRSTBP (1 << 5)
427 #define SPIRSBP2 (1 << 4)
428 #define SPIRSBP1 (1 << 3)
429 #define SPIRSBP0 (1 << 2)
430 #define SPIRSWRE (1 << 1)
431 #define SPIRSBUSY (1 << 0)
434 #define SPIC2CSDN 0xF
435 #define SPIC2CSDN_S 28
436 #define SPIC2CSDM 0x3
437 #define SPIC2CSDM_S 26
438 #define SPIC2MOSIDN 0x7
439 #define SPIC2MOSIDN_S 23
440 #define SPIC2MOSIDM 0x3
441 #define SPIC2MOSIDM_S 21
442 #define SPIC2MISODN 0x7
443 #define SPIC2MISODN_S 18
444 #define SPIC2MISODM 0x3
445 #define SPIC2MISODM_S 16
446 #define SPIC2CKOHM 0xF
447 #define SPIC2CKOHM_S 12
448 #define SPIC2CKOLM 0xF
449 #define SPIC2CKOLM_S 8
456 #define SPICLK_EQU_SYSCLK (1 << 31)
457 #define SPICLKDIVPRE 0x1FFF
458 #define SPICLKDIVPRE_S 18
459 #define SPICLKCN 0x3F
460 #define SPICLKCN_S 12
461 #define SPICLKCH 0x3F
463 #define SPICLKCL 0x3F
467 #define SPIUCOMMAND (1 << 31)
468 #define SPIUADDR (1 << 30)
469 #define SPIUDUMMY (1 << 29)
470 #define SPIUMISO (1 << 28)
471 #define SPIUMOSI (1 << 27)
472 #define SPIUDUMMYIDLE (1 << 26)
473 #define SPIUMOSIH (1 << 25)
474 #define SPIUMISOH (1 << 24)
475 #define SPIUPREPHOLD (1 << 23)
476 #define SPIUCMDHOLD (1 << 22)
477 #define SPIUADDRHOLD (1 << 21)
478 #define SPIUDUMMYHOLD (1 << 20)
479 #define SPIUMISOHOLD (1 << 19)
480 #define SPIUMOSIHOLD (1 << 18)
481 #define SPIUHOLDPOL (1 << 17)
482 #define SPIUSIO (1 << 16)
483 #define SPIUFWQIO (1 << 15)
484 #define SPIUFWDIO (1 << 14)
485 #define SPIUFWQUAD (1 << 13)
486 #define SPIUFWDUAL (1 << 12)
487 #define SPIUWRBYO (1 << 11)
488 #define SPIURDBYO (1 << 10)
489 #define SPIUAHBEM 0x3
490 #define SPIUAHBEM_S 8
491 #define SPIUSME (1 << 7)
492 #define SPIUSSE (1 << 6)
493 #define SPIUCSSETUP (1 << 5)
494 #define SPIUCSHOLD (1 << 4)
495 #define SPIUAHBUCMD (1 << 3)
496 #define SPIUAHBUCMD4B (1 << 1)
497 #define SPIUDUPLEX (1 << 0)
500 #define SPILCOMMAND 28
506 #define SPIMCOMMAND 0xF
507 #define SPIMADDR 0x3F
508 #define SPIMDUMMY 0xFF
509 #define SPIMMISO 0x1FF
510 #define SPIMMOSI 0x1FF
513 #define SPISSRES (1 << 31)
514 #define SPISE (1 << 30)
515 #define SPISBE (1 << 29)
516 #define SPISSE (1 << 28)
517 #define SPISCD (1 << 27)
518 #define SPISTRCNT 0xF
519 #define SPISTRCNT_S 23
525 #define SPIDCSIM_S 10
526 #define SPISTRIE (1 << 9)
527 #define SPISWSIE (1 << 8)
528 #define SPISRSIE (1 << 7)
529 #define SPISWBIE (1 << 6)
530 #define SPISRBIE (1 << 5)
531 #define SPISTRIS (1 << 4)
532 #define SPISWSIS (1 << 3)
533 #define SPISRSIS (1 << 2)
534 #define SPISWBIS (1 << 1)
535 #define SPISRBIS (1 << 0)
539 #define SPIS1FE (1 << 26)
540 #define SPIS1RSTA (1 << 25)
544 #define SPIS1WSDE (1 << 3)
545 #define SPIS1RSDE (1 << 2)
546 #define SPIS1WBDE (1 << 1)
547 #define SPIS1RBDE (1 << 0)
550 #define SPIS2WBDL 0xFF
551 #define SPIS2WBDL_S 24
552 #define SPIS2RBDL 0xFF
553 #define SPIS2RBDL_S 16
554 #define SPIS2WSDL 0xFF
555 #define SPIS2WSDL_S 8
556 #define SPIS2RSDL 0xFF
557 #define SPIS2RSDL_S 0
560 #define SPIS3WSCV 0xFF
561 #define SPIS3WSCV_S 24
562 #define SPIS3RSCV 0xFF
563 #define SPIS3RSCV_S 16
564 #define SPIS3WBCV 0xFF
565 #define SPIS3WBCV_S 8
566 #define SPIS3RBCV 0xFF
567 #define SPIS3RBCV_S 0
570 #define SPIE0TPPEN (1 << 31)
571 #define SPIE0TPPS 0xF
572 #define SPIE0TPPS_S 16
573 #define SPIE0TPPT 0xFFF
574 #define SPIE0TPPT_S 0
577 #define SPIE1TEREN (1 << 31)
578 #define SPIE1TERS 0xF
579 #define SPIE1TERS_S 16
580 #define SPIE1TERT 0xFFF
581 #define SPIE1TERT_S 0
588 #define SPIE2IHEN 0x3
589 #define SPIE2IHEN_S 0
592 #define SLCC0 ESP8266_REG(0xB00)
593 #define SLCIR ESP8266_REG(0xB04)
594 #define SLCIS ESP8266_REG(0xB08)
595 #define SLCIE ESP8266_REG(0xB0C)
596 #define SLCIC ESP8266_REG(0xB10)
597 #define SLCRXS ESP8266_REG(0xB14)
598 #define SLCRXP ESP8266_REG(0xB18)
599 #define SLCTXS ESP8266_REG(0xB1C)
600 #define SLCTXP ESP8266_REG(0xB20)
601 #define SLCRXL ESP8266_REG(0xB24)
602 #define SLCTXL ESP8266_REG(0xB28)
603 #define SLCIVTH ESP8266_REG(0xB2C)
604 #define SLCT0 ESP8266_REG(0xB30)
605 #define SLCT1 ESP8266_REG(0xB34)
606 #define SLCC1 ESP8266_REG(0xB38)
607 #define SLCS0 ESP8266_REG(0xB3C)
608 #define SLCS1 ESP8266_REG(0xB40)
609 #define SLCBC ESP8266_REG(0xB44)
610 #define SLCRXEDA ESP8266_REG(0xB48)
611 #define SLCTXEDA ESP8266_REG(0xB4C)
612 #define SLCRXEBDA ESP8266_REG(0xB50)
613 #define SLCAT ESP8266_REG(0xB54)
614 #define SLCSS ESP8266_REG(0xB58)
615 #define SLCRXDC ESP8266_REG(0xB5C)
616 #define SLCTXD ESP8266_REG(0xB60)
617 #define SLCTXDB0 ESP8266_REG(0xB64)
618 #define SLCTXDB1 ESP8266_REG(0xB68)
619 #define SLCRXD ESP8266_REG(0xB6C)
620 #define SLCRXDB0 ESP8266_REG(0xB70)
621 #define SLCRXDB1 ESP8266_REG(0xB74)
622 #define SLCDT ESP8266_REG(0xB78)
623 #define SLCID ESP8266_REG(0xB7C)
624 #define SLCHIR ESP8266_REG(0xB88)
625 #define SLCHC0 ESP8266_REG(0xB94)
626 #define SLCHC1 ESP8266_REG(0xB98)
627 #define SLCHIS ESP8266_REG(0xB9C)
628 #define SLCHC2 ESP8266_REG(0xBA0)
629 #define SLCHC3 ESP8266_REG(0xBA4)
630 #define SLCHC4 ESP8266_REG(0xBA8)
631 #define SLCHIC ESP8266_REG(0xBB0)
632 #define SLCHIE ESP8266_REG(0xBB4)
633 #define SLCHC5 ESP8266_REG(0xBBC)
638 #define SLCDTBE (1 << 9)
639 #define SLCDBE (1 << 8)
640 #define SLCRXNRC (1 << 7)
641 #define SLCRXAW (1 << 6)
642 #define SLCRXLT (1 << 5)
643 #define SLCTXLT (1 << 4)
644 #define SLCAR (1 << 3)
645 #define SLCAFR (1 << 2)
646 #define SLCRXLR (1 << 1)
647 #define SLCTXLR (1 << 0)
650 #define SLCITXDE (1 << 21)
651 #define SLCIRXDER (1 << 20)
652 #define SLCITXDER (1 << 19)
653 #define SLCITH (1 << 18)
654 #define SLCIRXEOF (1 << 17)
655 #define SLCIRXD (1 << 16)
656 #define SLCITXEOF (1 << 15)
657 #define SLCITXD (1 << 14)
658 #define SLCIT0 (1 << 13)
659 #define SLCIT1 (1 << 12)
660 #define SLCITXO (1 << 11)
661 #define SLCIRXU (1 << 10)
662 #define SLCITXS (1 << 9)
663 #define SLCIRXS (1 << 8)
664 #define SLCIFH7 (1 << 7)
665 #define SLCIFH6 (1 << 6)
666 #define SLCIFH5 (1 << 5)
667 #define SLCIFH4 (1 << 4)
668 #define SLCIFH3 (1 << 3)
669 #define SLCIFH2 (1 << 2)
670 #define SLCIFH1 (1 << 1)
671 #define SLCIFH0 (1 << 0)
674 #define SLCRXE (1 << 1)
675 #define SLCRXF (1 << 0)
678 #define SLCTXE (1 << 1)
679 #define SLCTXF (1 << 0)
682 #define SLCRXFP (1 << 16)
683 #define SLCRXWDM (0x1FF)
687 #define SLCTXFP (1 << 16)
688 #define SLCTXRDM (0x7FF)
692 #define SLCRXLP (1 << 31)
693 #define SLCRXLRS (1 << 30)
694 #define SLCRXLS (1 << 29)
695 #define SLCRXLE (1 << 28)
696 #define SLCRXLAM (0xFFFF)
700 #define SLCTXLP (1 << 31)
701 #define SLCTXLRS (1 << 30)
702 #define SLCTXLS (1 << 29)
703 #define SLCTXLE (1 << 28)
704 #define SLCTXLAM (0xFFFF)
708 #define SLCTM (0xFFF)
710 #define SLCTIM (1 << 14)
711 #define SLCTI (1 << 13)
712 #define SLCTW (1 << 12)
713 #define SLCTDM (0xFFF)
717 #define SLCBFMEM (0xF)
719 #define SLCBTEEM (0x3F)
723 #define SLCATAM (0x3)
725 #define SLCATMM (0x7)
731 #define SLCSW (1 << 8)
738 #define SLCBRXFE (1 << 20)
739 #define SLCBRXEM (1 << 19)
740 #define SLCBRXFM (1 << 18)
741 #define SLCBINR (1 << 17)
742 #define SLCBTNR (1 << 16)
743 #define SLCBPICM (0xFFFF)
747 #define i2c_bbpll 0x67
748 #define i2c_bbpll_hostid 4
749 #define i2c_bbpll_en_audio_clock_out 4
750 #define i2c_bbpll_en_audio_clock_out_msb 7
751 #define i2c_bbpll_en_audio_clock_out_lsb 7
752 #define I2S_CLK_ENABLE() i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 1)
753 #define I2SBASEFREQ (160000000L)
755 #define I2STXF ESP8266_REG(0xe00)
756 #define I2SRXF ESP8266_REG(0xe04)
757 #define I2SC ESP8266_REG(0xe08)
758 #define I2SIR ESP8266_REG(0xe0C)
759 #define I2SIS ESP8266_REG(0xe10)
760 #define I2SIE ESP8266_REG(0xe14)
761 #define I2SIC ESP8266_REG(0xe18)
762 #define I2ST ESP8266_REG(0xe1C)
763 #define I2SFC ESP8266_REG(0xe20)
764 #define I2SRXEN ESP8266_REG(0xe24)
765 #define I2SCSD ESP8266_REG(0xe28)
766 #define I2SCC ESP8266_REG(0xe2C)
769 #define I2SBDM (0x3F)
771 #define I2SCDM (0x3F)
775 #define I2SRMS (1 << 11)
776 #define I2STMS (1 << 10)
777 #define I2SRXS (1 << 9)
778 #define I2STXS (1 << 8)
779 #define I2SMR (1 << 7)
780 #define I2SRF (1 << 6)
781 #define I2SRSM (1 << 5)
782 #define I2STSM (1 << 4)
783 #define I2SRXFR (1 << 3)
784 #define I2STXFR (1 << 2)
785 #define I2SRXR (1 << 1)
786 #define I2STXR (1 << 0)
790 #define I2SITXRE (1 << 5)
791 #define I2SITXWF (1 << 4)
792 #define I2SIRXRE (1 << 3)
793 #define I2SIRXWF (1 << 2)
794 #define I2SITXPD (1 << 1)
795 #define I2SIRXTD (1 << 0)
798 #define I2STBII (1 << 22)
799 #define I2SRDS (1 << 21)
800 #define I2STDS (1 << 20)
801 #define I2SRBODM (0x3)
803 #define I2SRWODM (0x3)
805 #define I2STSODM (0x3)
807 #define I2STWODM (0x3)
809 #define I2STBODM (0x3)
811 #define I2SRSIDM (0x3)
813 #define I2SRWIDM (0x3)
815 #define I2SRBIDM (0x3)
817 #define I2STWIDM (0x3)
819 #define I2STBIDM (0x3)
823 #define I2SRXFMM (0x7)
825 #define I2STXFMM (0x7)
827 #define I2SDE (1 << 12)
828 #define I2STXDNM (0x3F)
830 #define I2SRXDNM (0x3F)
834 #define I2SRXCMM (0x3)
836 #define I2STXCMM (0x7)
843 #define RANDOM_REG32 ESP8266_DREG(0x20E44)
const uint8_t esp8266_gpioToFn[16]