Common.h
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1 /****
2  * Common.h - Architecture-independent definitions
3  *
4  * Copyright 2018 mikee47 <mike@sillyhouse.net>
5  *
6  * This file is part of the HardwareSPI Library
7  *
8  * This library is free software: you can redistribute it and/or modify it under the terms of the
9  * GNU General Public License as published by the Free Software Foundation, version 3 or later.
10  *
11  * This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
12  * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13  * See the GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along with this library.
16  * If not, see <https://www.gnu.org/licenses/>.
17  *
18  * @author: 11 December 2018 - mikee47 <mike@sillyhouse.net>
19  *
20  ****/
21 
22 #pragma once
23 
24 #include <WString.h>
25 #include <Data/BitSet.h>
26 #include "version.h"
27 
34 namespace HSPI
35 {
39 enum class ClockMode : uint8_t {
40  mode0 = 0x00,
41  mode1 = 0x01,
42  mode2 = 0x10,
43  mode3 = 0x11,
44 };
45 
49 enum class IoMode : uint8_t {
50  SPI,
51  SPIHD,
52  SPI3WIRE,
53  DUAL,
54  DIO,
55  SDI,
56  QUAD,
57  QIO,
58  SQI,
59  MAX,
60 };
61 
62 using IoModes = BitSet<uint16_t, IoMode, unsigned(IoMode::MAX)>;
63 
64 inline constexpr IoModes operator|(IoMode a, IoMode b)
65 {
66  return IoModes(IoModes::bitVal(a) | IoModes::bitVal(b));
67 }
68 
69 /*
70  * Details for each IO Mode
71  *
72  * Mode, clock bits, address bits, databits, duplex
73  */
74 #define HSPI_IOMODE_MAP(XX) \
75  XX(SPI, 1, 1, 1, true) \
76  XX(SPIHD, 1, 1, 1, false) \
77  XX(SPI3WIRE, 1, 1, 1, false) \
78  XX(DUAL, 1, 1, 2, false) \
79  XX(DIO, 1, 2, 2, false) \
80  XX(SDI, 2, 2, 2, false) \
81  XX(QUAD, 1, 1, 4, false) \
82  XX(QIO, 1, 4, 4, false) \
83  XX(SQI, 4, 4, 4, false)
84 
85 struct IoModeInfo {
86  const FlashString* name;
88  uint8_t clockBits : 3;
89  uint8_t addrressBits : 3;
90  uint8_t dataBits : 3;
91  bool duplex : 1;
92 };
93 
95 
96 inline String toString(IoMode mode)
97 {
98  return *getIoModeInfo(mode).name;
99 }
100 
101 // 0 for LSBFIRST, non-zero for MSBFIRST
102 using ByteOrder = uint8_t;
103 using BitOrder = uint8_t;
104 
108 enum class PinSet {
109  none,
110  normal,
111  manual,
112  overlap,
113 };
114 
115 // Note: These are faster than __builtin_bswapNN functions
116 
117 inline uint16_t bswap16(uint16_t value)
118 {
119  return (value >> 8) | (value << 8);
120 }
121 
122 inline uint32_t bswap24(uint32_t value)
123 {
124  return ((value >> 16) & 0x0000ff) | (value & 0x00ff00) | ((value << 16) & 0xff0000);
125 }
126 
127 inline uint32_t bswap32(uint32_t value)
128 {
129  return (value >> 24) | ((value >> 8) & 0xff00) | ((value << 8) & 0xff0000) | (value << 24);
130 }
131 
132 } // namespace HSPI
133 
Manage a set of bit values using enumeration.
Definition: BitSet.h:45
static constexpr S bitVal(E e)
Get the bitmask corresponding to a given value.
Definition: BitSet.h:150
describes a counted string stored in flash memory
Definition: String.hpp:174
The String class.
Definition: WString.h:137
Definition: Common.h:35
ClockMode
SPI clock polarity (CPOL) and phase (CPHA)
Definition: Common.h:39
@ mode1
CPOL: 0 CPHA: 1.
@ mode3
CPOL: 1 CPHA: 1.
@ mode0
CPOL: 0 CPHA: 0.
@ mode2
CPOL: 1 CPHA: 0.
IoMode
Mode of data transfer.
Definition: Common.h:49
@ SQI
Four bits per clock for Command, Address and Data.
@ SPIHD
One bit per clock, MISO stage follows MOSI (half-duplex)
@ SPI
One bit per clock, MISO stage concurrent with MISO (full-duplex)
@ SPI3WIRE
Half-duplex using MOSI for both sending and receiving data.
@ DIO
Two bits per clock for Address and Data, 1-bit for Command.
@ DUAL
Two bits per clock for Data, 1-bit for Command and Address.
@ QIO
Four bits per clock for Address and Data, 1-bit for Command.
@ QUAD
Four bits per clock for Data, 1-bit for Command and Address.
@ SDI
Two bits per clock for Command, Address and Data.
PinSet
How SPI hardware pins are connected.
Definition: Common.h:108
@ none
Disabled.
@ manual
HSPI pins with manual chip select.
@ overlap
Overlapped with SPI 0.
@ normal
Standard HSPI pins.
constexpr IoModes operator|(IoMode a, IoMode b)
Definition: Common.h:64
uint32_t bswap24(uint32_t value)
Definition: Common.h:122
const IoModeInfo getIoModeInfo(IoMode mode)
uint8_t BitOrder
Definition: Common.h:103
uint32_t bswap32(uint32_t value)
Definition: Common.h:127
uint16_t bswap16(uint16_t value)
Definition: Common.h:117
uint8_t ByteOrder
Definition: Common.h:102
BitSet< uint16_t, IoMode, unsigned(IoMode::MAX)> IoModes
Definition: Common.h:62
String toString(IoMode mode)
Definition: Common.h:96
Definition: Common.h:85
uint8_t addrressBits
Definition: Common.h:89
uint8_t clockBits
Definition: Common.h:88
uint8_t dataBits
Definition: Common.h:90
const FlashString * name
Definition: Common.h:86
IoMode mode
Definition: Common.h:87
bool duplex
Definition: Common.h:91