IS62-65.h
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1 /****
2  * IS62-62.h
3  *
4  * Copyright 2020 mikee47 <mike@sillyhouse.net>
5  *
6  * This file is part of the HardwareSPI Library
7  *
8  * This library is free software: you can redistribute it and/or modify it under the terms of the
9  * GNU General Public License as published by the Free Software Foundation, version 3 or later.
10  *
11  * This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
12  * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13  * See the GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along with this library.
16  * If not, see <https://www.gnu.org/licenses/>.
17  *
18  * @author: October 2020 - mikee47 <mike@sillyhouse.net>
19  *
20  ****/
21 
22 #pragma once
23 
24 #include "../MemoryDevice.h"
25 
26 namespace HSPI
27 {
28 namespace RAM
29 {
34 class IS62_65 : public MemoryDevice
35 {
36 public:
37  using MemoryDevice::MemoryDevice;
38 
42  enum class OpMode {
43  Byte = 0x00,
44  Page = 0x80,
45  Sequential = 0x40,
46  };
47 
48  size_t getSize() const override
49  {
50  return 256 * 1024;
51  }
52 
53  IoModes getSupportedIoModes() const override
54  {
56  }
57 
61  bool begin(PinSet pinSet, uint8_t chipSelect, uint32_t clockSpeed)
62  {
63  if(!MemoryDevice::begin(pinSet, chipSelect, clockSpeed)) {
64  return false;
65  }
66 
69 
70  // Ensure device is in SPI mode
72  Request req;
73  req.out.set8(0xFF);
74  execute(req);
76  execute(req);
78 
79  debug_i("RDMR = 0x%08x", getOpMode());
80 
83 
84  return true;
85  }
86 
87  bool setIoMode(IoMode mode) override
88  {
89  auto oldMode = MemoryDevice::getIoMode();
90  if(oldMode == mode) {
91  return true;
92  }
93 
94  if(!isSupported(mode)) {
95  debug_e("setIoMode(): Mode %u invalid", unsigned(mode));
96  return false;
97  }
98 
99  Request req;
100  if(oldMode != IoMode::SPIHD) {
101  req.out.set8(0xFF); // Exit SDI/SQI mode
102  execute(req);
104  }
105 
106  if(mode != IoMode::SPIHD) {
107  req.out.set8((mode == IoMode::SDI) ? 0x3B : 0x38);
108  execute(req);
109  }
110 
111  return MemoryDevice::setIoMode(mode);
112  }
113 
114  void setOpMode(OpMode mode)
115  {
116  auto savedIoMode = getIoMode();
117  if(!setIoMode(IoMode::SPIHD)) {
118  debug_e("writeMode() requires SPIHD IO");
119  return;
120  }
121 
122  debug_i("WRMR(%u)", unsigned(mode));
123  Request req;
124  req.setCommand8(0x01); // WRMR
125  req.out.set8(uint8_t(mode));
126  execute(req);
127  this->opMode = mode;
128 
129  setIoMode(savedIoMode);
130  }
131 
138  OpMode getOpMode() const
139  {
140  return opMode;
141  }
142 
148  {
149  // requires SPIHD
150  auto savedIoMode = getIoMode();
152 
153  Request req;
154  req.setCommand8(0x05); // RDMR
155  req.in.set8(0);
156  execute(req);
157  opMode = OpMode(req.in.data8);
158 
159  setIoMode(savedIoMode);
160  return opMode;
161  }
162 
163  void prepareWrite(HSPI::Request& req, uint32_t address) override
164  {
165  wait(req);
166  req.setCommand8(0x02); // Write
167  req.setAddress24(address);
168  req.dummyLen = 0;
169  }
170 
171  void prepareRead(HSPI::Request& req, uint32_t address) override
172  {
173  wait(req);
174  req.setCommand8(0x03); // Read
175  req.setAddress24(address);
176  req.dummyLen = 8 / getBitsPerClock();
177  }
178 
179 private:
180  OpMode opMode{OpMode::Sequential};
181  HSPI::Request req1;
182  HSPI::Request req2;
183 };
184 
185 } // namespace RAM
186 } // namespace HSPI
Definition: Common.h:34
@ SDI
Two bits per clock for Command, Address and Data.
bool begin(PinSet pinSet, uint8_t chipSelect, uint32_t clockSpeed)
Register device with controller and prepare for action.
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:122
IoMode getIoMode() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:209
OpMode getOpMode() const
Get current operating mode (cached value)
Definition: IS62-65.h:195
void setOpMode(OpMode mode)
Definition: IS62-65.h:171
void prepareRead(HSPI::Request &req, uint32_t address) override
Prepare without buffer.
Definition: IS62-65.h:228
@ Sequential
Access entire memory array (DEFAULT)
void setBitOrder(BitOrder bitOrder)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:160
void setAddress24(uint32_t address)
Set 24-bit address.
Definition: HardwareSPI/src/include/HSPI/Request.h:154
size_t getSize() const override
Definition: IS62-65.h:105
#define MSBFIRST
Definition: WConstants.h:63
virtual bool setIoMode(IoMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:200
@ SQI
Four bits per clock for Command, Address and Data.
bool setIoMode(IoMode mode) override
Definition: IS62-65.h:144
void setClockMode(ClockMode mode)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:173
bool begin(PinSet pinSet, uint8_t chipSelect, uint32_t clockSpeed)
Configure the RAM into a known operating mode.
Definition: IS62-65.h:118
bool isSupported(IoMode mode) const
Determine if the device/controller combination supports an IO mode Must be called after begin() as ot...
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:195
Data out
Outgoing data.
Definition: HardwareSPI/src/include/HSPI/Request.h:91
IoMode
Mode of data transfer.
Definition: Common.h:49
#define debug_e(fmt,...)
Definition: debug_progmem.h:77
IoModes getSupportedIoModes() const override
Return set of IO modes supported by a device implementation.
Definition: IS62-65.h:110
void prepareWrite(HSPI::Request &req, uint32_t address) override
Prepare request without data.
Definition: IS62-65.h:220
Defines an SPI Request Packet.
Definition: HardwareSPI/src/include/HSPI/Request.h:79
Manage a set of bit values using enumeration.
Definition: BitSet.h:44
PinSet
How SPI hardware pins are connected.
Definition: Common.h:108
OpMode readOpMode()
Read current operating mode from device.
Definition: IS62-65.h:204
void setCommand8(uint8_t command)
Set 8-bit command.
Definition: HardwareSPI/src/include/HSPI/Request.h:119
size_t getBitsPerClock() const
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:214
@ mode0
CPOL: 0 CPHA: 0.
uint8_t dummyLen
Dummy read bits between address and read data, 0 - 255.
Definition: HardwareSPI/src/include/HSPI/Request.h:89
void execute(Request &request)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:233
void set8(uint8_t data)
Set to single 8-bit value.
Definition: Data.h:142
OpMode
Memory operating mode determines how read/write operations are performed.
Definition: IS62-65.h:99
void wait(Request &request)
Definition: Libraries/HardwareSPI/src/include/HSPI/Device.h:248
@ Byte
Limited to one byte.
@ SPIHD
One bit per clock, MISO stage follows MOSI (half-duplex)
#define debug_i
Definition: debug_progmem.h:107
@ Page
Limited to single 32-bit page.